Description: 一个基于verilog的sdram读写控制器，可以将数据写入sdram并读回。-One based on the sdram verilog write controller, data can be written to and read back sdram. Platform: |
Size: 96256 |
Author:陈栋磊 |
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Description: 本代码为Altera DE2开发板例程源码，（FPGA：EP2C35F672C6）quartus II 9.0以上可以编译（随板源码为7.2以下版本，在9.0以上版本编译会报错）。本代码实现一个音视频播放器TV_BOX。-This demonstration plays video and audio input a DVD player using the VGA output and audio CODEC on the DE2 board. There are two major blocks in the circuit, called I2C_AV_Config and TV_to_VGA. The TV_to_VGA block consists
of the ITU-R 656 Decoder, SDRAM Frame Buffer, YUV422 to YUV444, YCrCb to RGB, and VGA Controller. Platform: |
Size: 215040 |
Author:chenxin |
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Description: 在DDR3内存控制器一起使用JESD79-3C符合标准SDRAM器件接口。内存类型，如DDR1 SDRAM，DDR2 SDRAM，SDR SDRAM，SBSRAM和异步不支持的回忆。在DDR3内存控制器，SDRAM，可用于程序和数据存储。梯形失真校正设备有一个实例。-Use JESD79-3C standard SDRAM DDR3 memory controller interface devices together. Memory types, such as DDR1 SDRAM, DDR2 SDRAM, SDR SDRAM, SBSRAM and do not support asynchronous memories. In DDR3 memory controller, SDRAM, can be used for program and data storage. Keystone device has one instance. Platform: |
Size: 479232 |
Author:youwenjiang |
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Description: Code for use with windows on FPGA and provides latest controller for SDRAm and Flash at the same time Platform: |
Size: 7843840 |
Author:rajban
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